Metal oxide semiconductor heterostructure field effect transistor
US6690042B2 · kind B2 · utility
72Cited by
6References
20Claims
0Family size
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Key dates
| Filing date | Sep 27, 2001 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Sep 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A method and structure for producing nitride based heterostructure devices having substantially lower reverse leakage currents and performance characteristics comparable to other conventional devices. The method and structure include placing one or more layers of nitride-based compounds over a substrate. Additionally, a dielectric layer including silicon dioxide is placed over the nitride-based layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.