Shielded planar dielectrically isolated high speed pin photodiode and method for producing same

US6690078B1 · kind B1 · utility

Assignee

• Integration Associates Inc. · US

Inventors

• Pierre Irissou · Sunnyvale, US
• Brian B. North · Los Gatos, US
• Wayne T. Holcombe · Mountain View, US
• Stephen F. Colaco · Manchester, GB

Key dates

• Filing date: Aug 4, 2000
• Grant date: Feb 10, 2004
• Expiry date: Dec 30, 2020

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02E10/548

Abstract

A PIN photodiode and method for forming the PIN photodiode are shown where an intrinsic layer of the photodiode can be made arbitrarily thin and a second active region of the photodiode substantially shields a first active region of the photodiode. A fabrication substrate is lightly doped in order to form the intrinsic layer of the photodiode. A void is formed in a first surface of the fabrication substrate and a first active region of the photodiode having a first conductivity type is formed in the void. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A depth of the void is selected such that a portion of the first active region is exposed at the second surface of the fabrication substrate after lapping. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate. The second active region may be formed such that it substantially surrounds the exposed portion of the first a…