Current-compensated CMOS output buffer adjusting edge rate for process, temperature, and Vcc variations
US6690192B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 16, 2002 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Dec 22, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00384
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Edge rates for output driver transistors are increased for slower conditions such as caused by supply-voltage, temperature, and process variations. The edge rates are increased by increasing charging and discharging currents to the gates of the driver transistors. Process-sensing transistors have gates tied to power or ground. Current through the process-sensing transistors changes with supply-voltage, temperature, and process variations. The currents through process-sensing transistors are used to generate process-compensated voltages that bias current sources and sinks to adjust process-dependent currents. Process-independent or fixed current sources and sinks use process-independent reference voltages ultimately generated from reference currents that are not sensitive to process variations. The process-dependent-currents are subtracted from the fixed currents to produce the charging and discharging currents.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.