Patent · US Expired

Method and apparatus for a failure-free synchronizer

US6690203B2 · kind B2 · utility

14Cited by
1References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 28, 2001
Grant dateFeb 10, 2004
Priority date
Expiry dateApr 22, 2022

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/14
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Unlike prior art synchronizers and asynchronous arbiters that produce glitches in their outputs, the present invention provides a failure-free synchronizer that can sample an arbitrary and unstable inputs while maintaining zero probability of system failure. In particular, the invention addresses the synchronization failure problem and the lack of a metastable state in prior art synchronizers. Prior attempts have shown that the conditions re<CUSTOM-CHARACTER FILE="US06690203-20040210-P00900.TIF" ALT="custom character" HE="20" WI="20" ID="CUSTOM-CHARACTER-00001"/>x and re<CUSTOM-CHARACTER FILE="US06690203-20040210-P00900.TIF" ALT="custom character" HE="20" WI="20" ID="CUSTOM-CHARACTER-00002"/><CUSTOM-CHARACTER FILE="US06690203-20040210-P00901.TIF" ALT="custom character" HE="20" WI="20" ID="CUSTOM-CHARACTER-00003"/>x (where re is the control input and x is the data input) cannot be arbitrated. To overcome this, embodiments of the present invention introduce explicit signals a0 and a1 to hold the values re<CUSTOM-CHARACTER FILE="US06690203-20040210-P00900.TIF" ALT="custom character" HE="20" WI="20" ID="CUSTOM-CHARACTER-00004"/>x and re<CUSTOM-CHARACTER FILE="US06690203-20040210-P00900…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.