High speed transmission system with clock inclusive balanced coding
US6690309B1 · kind B1 · utility
34Cited by
5References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2001 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Dec 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4908
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data transmission system (100) may include a transmitting portion (102) and a receiving portion (104). A transmitting portion (102) may include an encoder (106) that may encode data values of n bits into codes of m bits, where n is less than m. Codes may be transmitted with corresponding clock values. The absolute value of the DC component of a code summed with a corresponding clock value can be no more tan one for all code values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.