Integrated circuit architecture of contact image sensor for generating binary images
US6690420B1 · kind B1 · utility
Assignees
Inventor
Key dates
| Filing date | Feb 5, 1999 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Feb 5, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/60
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit architecture of contact image sensor for generating bi-level images and associated method are disclosed. The architecture comprises an image sensor, an amplifier, an analyzing circuit and a comparator, in one particular embodiment, it further comprises an electrically erasable programmable read-only memory (EEPROM). The amplifier is coupled to the image sensor and receives electronic signals therefrom and further receives pairs of gain and offset from the EEPROM. The electronic signals are adjusted in the amplifier respectively and sequentially in accordance to the pairs of gain and offset. The analyzing circuit determines a dynamic threshold to the comparator that subsequently produces the bi-level images.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.