Solid-state image pickup apparatus
US6690423B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1999 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Mar 19, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/927
Abstract
The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain. The position of an end of the signal accumulating section adjacent to the gate electrode of the MOS transistor extends over the end of the reading gate electrode of the p+ diffusion layer to a position below the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.