Flexible Viterbi decoder for wireless applications
US6690750B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1999 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Dec 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6569
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Viterbi decoder system is provided in accordance with the present invention. The decoder system includes a State Metric Update unit including a state metric memory and a cascaded Add/Compare/Select (ACS) unit. The cascaded ACS unit comprises a plurality of serially coupled ACS stages for performing a plurality of ACS operations in conjunction with the state metric memory. An ACS stage is operable to identify a plurality of path decisions and communicate the identified path decisions to a next ACS stage coupled thereto. A Traceback unit is provided for storing a set of accumulated path decisions in a traceback memory associated therewith, and performing a traceback on the set of accumulated path decisions. The path decisions associated with the ACS stage and the next ACS stage are accumulated as a set during the ACS operations before being written to the traceback memory, thereby minimizing accesses to the traceback memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.