Method and system for analyzing test coverage
US6691079B1 · kind B1 · utility
Inventors
Key dates
| Filing date | May 28, 1999 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | May 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for determining test coverage of an original high level language description which represents an electrical circuit by the data of at least one dump file exported by a simulation program, the original high level description having at least one executable assignment statement which models the circuit, the at least one executable assignment statement having a left side and a right side separated by an assignment operator, the left side being a variable, and the right side being an expression which has a set of at least one variable and at least one logic operator, the expression on the right side, when evaluated, determining a value to be assigned to the variable on the left side, the data of the dump file consisting of the values of all the variables of the originals high level language description between a simulation start time instant and a simulation end time instant the method comprising: a description importing step for importing the original high level language description to form a design database; a dump file importing step for importing the dump file; and a test coverage determining step for determining the test coverage of the original high level language descrip…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.