Apparatus for accelerating the rendering of images
US6691180B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2001 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Jun 5, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A direct memory access (DMA) circuit which is physically positioned with an input/output device, the DMA circuit storing a first reference value pointing to a data structure which describes a buffer portion of system memory in which data is stored for transfer to the I/O device, a value determining a position within the buffer portion of system memory beginning at which a next sequence of data is to be placed, and a value determining a position within the buffer portion of system memory from which a next sequences of data is to be copied to the I/O device, the DMA circuit including circuitry for reading data from the buffer portion of system memory beginning at the position from which a next sequences of data is to be copied and for writing the data read to the I/O device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.