Detecting errors in coded bit strings
US6691278B1 · kind B1 · utility
7Cited by
7References
61Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1999 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Oct 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/15
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A parity check matrix is generated for detecting predefined errors in a coded string of bits. A column of the matrix is generated by selecting values for elements in the column and processing a predefined error with the selected values in order to produce a syndrome. The selected values are assigned to the column of the parity check matrix if an element of the syndrome has a value indicative of the predefined error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.