Silicon oxide based gate dielectric layer
US6693051B2 · kind B2 · utility
7Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2001 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Feb 1, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/265
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a dielectric layer formed between a first and a second conductive layer. The dielectric layer comprising a layer of silicon oxide, SiOX≦2, having a dielectric constant greater than about 3.9 and less than or equal to about 12.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.