Dynamic offset correction in detector arrays
US6693279B2 · kind B2 · utility
5Cited by
9References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2001 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Dec 13, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A signal processing technique applied to the readout of two-dimensional detector arrays provides a dynamic correction mechanism for the varying offsets of the different elements of the array. The outputs of the elements are supplied to an offset correction circuit operative to compensate for the differences in the d.c. or low frequency outputs from a predetermined voltage wherein a fraction of the difference is subtracted at each successive cycle to gradually reduce the difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.