Thin film transistor formed by an etching process with high anisotropy
US6693297B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2001 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Jun 18, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/90
Abstract
The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.