Clock and data recovery method and apparatus
US6693985B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2001 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Oct 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of a clock and data recovery method and apparatus include receiving a multi-channel serial digitally encoded signal and converting the received signal to digital data, or set of binary characters. One embodiment includes determining whether a phase of a sampling circuit is appropriate to sample meaningful data from a received signal; if the phase of the sampling circuit is not appropriate, the phase is shifted so that sampling occurs earlier or later for the received signal. The determination is based, in one embodiment, on the order and value of the samples taken, which indicate whether the samples are taken too close to a transition of the received signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.