Data encryption integrated circuit with on-board dual-use memory
US6694430B1 · kind B1 · utility
31Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1999 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Mar 5, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface chip for a peripheral module connectable to and for use with a host computer is provided which utilizes an static Random access memory (SRAM) within the interface chip for both encryption of data packets and temporary storage of Card Information Structure (CIS) information. The CIS information is stored in the SRAM only during the power-up phase of operation, when encryption of data packets is not necessary and thus the memory is not being utilized for that purpose. This precludes the need for a separate SRAM IC, thus saving space on the card.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.