System and method for reducing over-shoot and ringback by delaying input and establishing a synchronized pulse over which clamping is applied
US6694444B1 · kind B1 · utility
2Cited by
9References
30Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2000 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Mar 6, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment of the invention, a clamping circuit clamps an input signal to reduce overshoot and ringback. A pulse generator generates a pulse signal having a pulse interval from the input signal and a delayed signal. The input signal transitions from a first level to a second level. The delayed signal is derived from the input signal. A controller generates a control signal responsive to the pulse signal. A switching circuit clamps one of the overshoot and the ringback of the input signal within the pulse interval upon receipt of the control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.