System and method for monitoring execution of privileged instructions
US6694457B2 · kind B2 · utility
41Cited by
16References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 6, 2001 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Jul 30, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/481
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system monitors the execution of privileged instructions by a processor of a computer system. The processor includes a current privilege level. The processor automatically generates a fault when attempting execution of an instruction requiring a higher privilege level than the current privilege level of the processor. The current privilege level of the processor is raised in response to a fault generated by a first faulting instruction. The first faulting instruction is executed. A trap is generated by executing the first faulting instruction. The current privilege level of the processor is lowered in response to the trap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.