Semiconductor device with improved peripheral resistance element and method for fabricating same
US6696719B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 6, 2000 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Dec 6, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
A semiconductor device in which a cell capacitor with an MIM or MIS structure is formed using a conductive material with a low resistivity for the upper electrode and a resistance element is formed using a conductive material with high resistance without increasing the complexity of the fabrication process. A plate electrode used for the upper electrode of the cell capacitor and for the resistance element is made by forming a three-layer structure including a low resistance conductive material layer, an insulating film layer on the low resistance conductive material layer, and a high resistance conductive material layer on the insulating film layer, patterning the three-layer structure in the same shape, and using the low resistance conductive material layer as the upper electrode of the cell capacitor and the high resistance conductive material layer as the resistance element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.