Patent · US Expired

Electrically erasable, programmable, non-volatile memory device compatible with a CMOS/SOI production process

US6696723B2 · kind B2 · utility

2Cited by
18References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 28, 1998
Grant dateFeb 24, 2004
Priority date
Expiry dateJul 28, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/201

Abstract

The invention relates to an electrically erasable, non-volatile memory device, having a memory cell of the floating gate type (16), defined by a source zone, a drain zone, a channel zone (8) and a control gate zone (6), the latter being separated from the channel zone by an insulation zone (14), said five zones being implemented in a semiconductor film formed on an insulating layer (4), said memory cell being laterally insulated by one or more insulation zones (10, 12) in contact with the insulating layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.