Patent · US Expired

Single-event upset immune flip-flop circuit

US6696874B2 · kind B2 · utility

8Cited by
4References
7Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJul 23, 2002
Grant dateFeb 24, 2004
Priority date
Expiry dateJul 23, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K3/35625
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A single-event upset immune flip-flop circuit is disclosed. The single-event upset immune flip-flop circuit includes a first single-event upset immune latch and a second single-event upset immune latch. The first single-event upset immune latch has two inputs and two outputs. The second single-event upset immune latch also has two inputs and two outputs. The two inputs of the second single-event upset immune latch is connected to the two outputs of the first single-event upset immune latch. The state of the first single-event upset immune latch changes only when the signal polarities at both inputs of the first single-event upset immune latch are identical. Similarly, the state of the second single-event upset immune latch changes only when the signal polarities at both inputs of the second single-event upset immune latch are identical.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.