Partial mismatch-shaping digital-to-analog converter
US6697004B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2001 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Oct 1, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A novel mismatched-shaping DAC architecture is described. The inventive DAC partially spectrally shapes data conversion errors. In accordance with the present invention, the DAC mismatch-shaping function is fully effective for input signal amplitude levels that are relatively low (i.e., close to mid-scale), however, the mismatch-shaping function is not fully effective for input signal amplitude levels that are relatively high. This results in the simplification in complexity, reduced power dissipation, and shortened propagation delays associated with the mismatch-shaping DAC digital logic circuitry. Exemplary delta-sigma ADC and DAC architectures adapted for use with the present inventive partial mismatch-shaping DAC are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.