Analog to digital converter with interpolation of reference ladder
US6697005B2 · kind B2 · utility
9Cited by
5References
41Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 31, 2002 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | May 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An N-bit analog to digital converter includes a reference ladder connected to an input voltage at one end, and to ground at another end, an array of differential amplifiers whose differential inputs are connected to taps from the reference ladder, wherein each amplifier has a first differential input connected to the same tap as a neighboring amplifier, and a second differential input shifted by one tap from the neighboring amplifier, and an encoder that converts outputs of the array to an N-bit output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.