Patent · US Expired

Power semiconductor module

US6697257B1 · kind B1 · utility

26Cited by
11References
29Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 9, 2002
Grant dateFeb 24, 2004
Priority date
Expiry dateJun 24, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Disclosed in a power semiconductor module which includes a stack of carrier substrates, disposed one above the other in multiple layers and provided with at least one conductor track on at least one main surface, in which at least one electronic semiconductor component is disposed between two adjacent carrier substrates of the stack and is contacted electrically and heat-conductively to at least one conductor track of a carrier substrate disposed in the stack above the semiconductor component and to at least one further conductor track of a carrier substrate disposed in the stack below the semiconductor component. To both improve heat output and provide a compact design, the two outer carrier substrates of the stack are embodied as one upper and one lower housing wall of a closed housing part surrounding the at least one semiconductor component, and the interstices between the stacked carrier substrates are tightly closed by an encompassing wall secured to the carrier substrates.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.