Fast convergent pipelined adaptive decision feedback equalizer using post-cursor processing filter
US6697424B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2003 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | May 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03617
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A fast convergent pipeline adaptive decision feedback equalizer using a post-cursor processing filter is disclosed, which includes a feed-forward equalizer, a post-cursor processing filter, an adder, a slicer, a register, a pipelined feedback equalizer, a subtractor and a updating device. The pipelined feedback equalizer has a delay device coupled to the register for delaying its output signal, and a feedback equalizer coupled to the delay device for eliminating the post-cursor of the output signal. By using the post-cursor processing filter (PCF), it increases the operating clock rate with arbitrary speedup factor, and improves the convergence rate of the overall system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.