Method and apparatus for phrase synchronizing a plurality of microcontrollers of a distributed microcontroller network in a brake-by-wire automobile braking system
US6697956B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 31, 2000 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Jan 31, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/42
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A synchronization arrangement for a distributed microcontroller network has a number of distributed microcontrollers each having an internal clock frequency. Each microcontroller transmits data signals via the network. A frequency correction arrangement of each microcontroller is arranged adjust the internal clock frequency, in dependence upon a phase difference between the internal clock frequency and the logic level transitions of the data signals received via the network, such that the clock frequencies of the microcontrollers become phase-synchronized over time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.