Local supply generator for a digital CMOS integrated circuit having an analog signal processing circuitry
US6700435B2 · kind B2 · utility
3Cited by
3References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 23, 2002 |
| Grant date | Mar 2, 2004 |
| Priority date | — |
| Expiry date | Aug 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Digital CMOS integrated circuit (120) comprising an analog signal processing circuitry with a series of two or more field-effect transistors (FETs). The FETs have a maximum allowed supply voltage value (Vmax). The digital CMOS integrated circuit (120) further comprises a local charge pump (135) for generating an elevated supply voltage (Vsupplydiff) larger than the maximum allowed supply voltage value (Vmax). The local charge pump (135) is arranged such that this elevated supply voltage (Vsupplydiff) is applied to the series of two or more of the field-effect transistors (FETs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.