Reduction of sensitivity of an amplifier to an offset voltage
US6700443B2 · kind B2 · utility
1Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2002 |
| Grant date | Mar 2, 2004 |
| Priority date | — |
| Expiry date | Jul 3, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G7/002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method of amplifying an input signal having a DC component and an AC component. The method includes the steps of: comparing the input signal with a reference value, generating an intermediate signal by subtracting from the input signal a correction signal resulting from the comparison step, rectifying the intermediate signal, evaluating a mean value of the rectified intermediate signal, and multiplying the input signal by the mean value. The invention allows a reduction in the sensitivity of the amplifier to the DC component of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.