Analog-to-digital converter that preseeds memory with channel identifier data and makes conversions at fixed rate with direct memory access
US6701395B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 1998 |
| Grant date | Mar 2, 2004 |
| Priority date | — |
| Expiry date | Feb 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including a DMA controller, an ADC having a plurality of conversion channels and address and data ports for connection to external memory means, the DMA controller being arranged to read a channel id from the memory means using the address and data port which channel id is representative of one of the said conversion channels, to pass the read channel id to the ADC, to cause the ADC to perform an analog-to-digital-conversion on the conversion channel represented by the channel id, to receive the conversion result from the ADC and to write the conversion result back to the memory means using the address and data ports. Also, an integrated circuit including a microcontroller having an output port, an address valid output line, a latch coupled to the output port, and a latch control fine coupled to the latch control of the latch the microcontroller being operable to present a first range of address bits at its output port, to activate the latch control line to cause the latch to latch the first range of bits, to present a second range of address bits at its output port and to activate the address valid line to indicate that the combination of the first and second…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.