Code error correcting circuit, code error correcting method, communicating apparatus and communicating method
US6701468B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2000 |
| Grant date | Mar 2, 2004 |
| Priority date | — |
| Expiry date | Jun 29, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6569
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A code error correcting circuit interleaves original data comprising a sequence of bit data having a length of p bits by arranging the bit data of the original data into a hypothetical matrix of I rows and J columns and then selecting the bit data positioned on the ith row along an order of the jth column. The circuit is provided with a memory unit having a plurality of memory areas each having a length of 2n bits; and a controller for storing the original data to be interleaved into the memory areas respectively. The bit data, which are indicated by a bit select data, stored in the memory unit are sequentially outputted along an order of the ith row and the jth column in the hypothetical matrix as the interleaved original data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.