Variable-capacitance capacitor
US6703681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2003 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | May 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/125
Abstract
The invention concerns a variable capacitance capacitor comprising a periodic structure of raised zones (5) separated by recesses (6) formed in a type N semiconductor substrate (1). The walls of the raised zones and the base of the recesses are coated with a conductive layer (9, 10). The substrate is connected to a first terminal (A) of the capacitor and the conductive layer to a second terminal (B) of the capacitor. At least the base of the recesses or the side of the raised zones comprises type P regions (8), the pitch of the raised parts being selected so that the space charging zones linked to the type P regions are joined when the voltage difference between said terminals exceeds a predetermined threshold. The zones not comprising type P regions are coated with an insulant (7) and a highly doped N region (10) is formed beneath the insulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.