Clock shaping circuit and electronic equipment
US6703877B2 · kind B2 · utility
8Cited by
5References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2002 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Nov 1, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a clock shaping circuit, a phase comparator 31, a selector 76, a loop filter 2, and a VCSO/VCXO 4 form a PLL circuit's main feedback loop during normal operation. When the main feedback loop of the PLL circuit malfunctions due to unlocking, a quartz crystal oscillator circuit is used, and a PLL circuit's backup feedback loop is established, which includes a backup phase comparator 74, the selector 76, the loop filter 2, and the VCSO/VCXO 4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.