Fast, stable overload recovery circuit and method
US6703900B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2002 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Jul 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3217
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifier includes an input stage (13) and an output stage (100) including an output transistor (M11) having a source coupled to a supply voltage (VDD), a gate coupled to a terminal (14) of the input stage, and a drain coupled to an output conductor (22). A recovery circuit (1A) is coupled between the supply voltage and the gate of the output transistor for limiting the voltage on the gate of the output transistor in response to the output voltage be within a predetermined range of the supply voltage and includes a recovery transistor (M4) with a source coupled to the output conductor and a drain coupled to the gate of the output transistor and a common-gate amplifier (29A) having a built-in offset a first input coupled to the output conductor, a second input coupled to the supply voltage, and an output coupled to the gate of the recovery transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.