Apparatus and method for processing signals in a plurality of digital signal processors
US6704308B2 · kind B2 · utility
7Cited by
6References
10Claims
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Key dates
| Filing date | Sep 29, 1998 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Sep 29, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for data processing in a flexible multiple-DSP architecture that can be readily adapted to changing customer demands and changes in DSP processing capability is described. The apparatus comprises of two or more processors, two or more dedicated serial data buses, and a shared data bus. Each processor processes data received via the dedicated data bus in a first type of processing task. Each processor processes data received via the shared data bus in a second type of processing task.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.