Peripheral bus jumper block for a configurable peripheral bus interconnect system
US6704832B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 31, 2001 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | May 27, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A peripheral bus jumper block that establishes an external peripheral bridge for linking independent peripheral bus signal paths (i.e., sets of electrical traces formed on a peripheral bus panel) of a peripheral bus interconnect system so that the signal paths have the functional equivalent of a single, continuous peripheral bus path. Accordingly, arrays of computer peripherals (e.g. disk drives) that are coupled to the peripheral bus signal paths within a peripheral device enclosure are chained together so as to be capable of being operated by the same computer controller, whereby the peripheral bus interconnect system can be selectively reconfigured to improve system flexibility. The peripheral bus jumper block has a pair of peripheral bus connectors that are detachably connected to respective peripheral bus connectors from a pair of the peripheral bus signal paths that are to be linked together.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.