Computer system and method of computer initialization with caching of option BIOS
US6704840B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2001 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Nov 23, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system and method for computer initialization with caching includes enabling at least one cache memory and then copying an option basic input/output system (BIOS) from a first memory to a Programmable Attribute Map (PAM) main memory area, the copying including executing a cache-line fill to the at least one cache memory. Initialization is then performed by providing control to the option BIOS, the execution being performed substantially from the at least one cache memory. Processor Memory Type Range Registers (MTRRs) for the PAM memory area may be programmed as write-back. The at least one cache memory may be at least one of level 1 (L1) and level 2 (L2) processor cache memories. The first memory may be a flash memory or a ROM Read Only Memory (ROM). The at least one cache memory may be flushed upon completion of the option BIOS execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.