Programmable frequency divider
US6707326B1 · kind B1 · utility
14Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 6, 1999 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Aug 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable frequency divider capable of a 50% duty cycle at odd and even integer division ratios. In one embodiment, the frequency divider is configured to produce an output signal having a period equal to a division ratio N times a period of a clock signal, and the division number N is a programmable variable which bears the following relationship to the number F of required storage elements: where P is 1 if the division ratio is odd, and 0 if the division ratio is even.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.