System and method for translation of SDRAM and DDR signals
US6707756B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 12, 2002 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Mar 12, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/109
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for converting signals between a memory interface and a memory array is disclosed. The memory interface is not the same type as the memory array such that the signals between the interface and the array need to be synchronized and translated. The circuit includes an interface converter for shifting the logic levels of the signals between the memory interface and the memory array. Furthermore, the circuit has a translation block for translating and synchronizing the signals. In this respect signals between the memory array and the memory interface are synchronized and translated such that the memory array can be used with a memory interface of a different type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.