Network switch memory interface configuration
US6707818B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2000 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Mar 17, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port interface, wherein the second data port interface supports a plurality of data ports for transmitting and receiving data at a second data rate, along with a third data port interface for transmitting and receiving data at a third data rate. A CPU interface is provided and configured to communicate with a CPU. The switch includes a first internal memory communicating with the first data port interface, the second data port interface, and the third data port interface. A first memory management unit having an external memory interface for communicating data from at least one of the first data port interfaces and the second data port interface to and from an external memory is also provided. A second internal memory is provided, the second internal memory communicating with the third data port interface. A second memory management unit is provided and used to control access to and from the second internal memory. A communica…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.