Method and apparatus for multi-mode fencing in a microprocessor system
US6708269B1 · kind B1 · utility
37Cited by
5References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1999 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Dec 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a multi-threaded system, such as in a multi-processor system, different types of fences are provided to force completion of programmatically earlier instructions in a program. The types of fences can be thread-specific, and different types of fences are used based on different kinds of conditions, instructions, operations, or memory types. When a fence is executed, senior stores, request buffers, bus queues, or any combination of these stages in an execution pipeline can be drained. Fetches at a front end of the pipeline can also be killed to ensure that the bus queue can be drained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.