Soft output viterbi algorithm (SOVA) with error filters
US6708308B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2001 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | May 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention is a Viterbi algorithm combined with the use of error filters outputs to produce bit reliabilities. The present invention is a SOVA-like method using error filters to reduce the complexity of bit reliability determination further than that of the ordinary SOVA method. Error patterns corresponding to each of a handful of dominant i.e., most common error patterns are determined from experimental data. Error filters determine likelihoods of each postulated error pattern. These likelihoods are then combined to produce bit reliabilities that may be passed on to an outer error correction decoder. The filters, typically six or seven of them, resolve most of the errors thereby simplifying computation dramatically.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.