Low input impedance with amplifier
US6710661B2 · kind B2 · utility
0Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2002 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | Jun 3, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/343
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to an amplifier CD including a first and a second transistor T1 and T2, connected in series between a power supply terminal VCC and ground terminal. According to the invention the transfer terminal of the first transistor T1 is connected to the bias terminal of the second transistor T2 and forms an input of the amplifier CD, the bias terminal of the first transistor T1 being connected to a reference potential terminal. An amplifier CD in accordance with the invention has low input impedance and a low common-mode output level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.