Layered product and capacitor
US6710997B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2002 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | May 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A layered product including a plurality of deposition units, each having a thin resin layer and a thin metal layer wherein the surface roughness of the thin resin layer is 0.1 &mgr;m or below, a protrusion forming component is not added to the thin resin layer or the surface roughness of the thin metal layer is 0.1 &mgr;m or below. The surface characteristics are improved regardless of the thickness of the layered product and the requirement of high performance thin film can be satisfied because the layered product contains no foreign matter. The layered product is suitably applicable to electronic parts, e.g., a capacitor, especially a chip capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.