Reference timing signal oscillator with frequency stability
US6711230B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | Sep 27, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/148
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An input reference timing signal oscillator of a phase-locked loop has a computer algorithm which adaptively models the multiple frequencies of an oscillator following a training period. The oscillator is part of a phase-locked loop and the oscillation frequency thereof is controlled in response to the phase detector output. The computer algorithm processes the control signal applied to the oscillator. The computer algorithm updates the characteristics of the model relating to the aging and temperature of the oscillator, using for example, a Kalman filter as an adaptive filter. By the algorithm, the subsequent model predicts the future frequency state of the oscillator on which it was trained. The predicted frequency of the model functions as a reference to correct the frequency of the oscillator in the event that no input reference timing signal is available. With the model updating algorithm, oscillators of low stability performance may be used as cellular base station reference oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.