Parallel electronic design automation: distributed simultaneous editing
US6711718B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Oct 10, 2002 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | Oct 10, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are described for allowing multiple users to simultaneously edit a design while being able to view edits to the entire design. A design (such as for a printed circuit board) having a plurality of exclusive areas is displayed to a plurality of users. A first user checks out a corresponding section of the design, and edits the design. A second user checks out a corresponding section of the design, and edits the design simultaneously with the first user editing the design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.