Semiconductor device

US6713886B2 · kind B2 · utility

Assignee

• SEIKO EPSON CORPORATION · JP

Inventors

• Takashi Kumagai · Tokyo, JP
• Masahiro Takeuchi · Tokyo, JP
• Satoru Kodaira · Chino, JP
• Takafumi Noda · Sakata, JP

Key dates

• Filing date: Apr 6, 2001
• Grant date: Mar 30, 2004
• Expiry date: Apr 6, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B10/12

Abstract

A semiconductor device includes an SRAM section and a logic circuit section formed on a single semiconductor substrate. First and second gate electrode layers located in a first conductive layer, first and second drain-drain contact layers located in a second conductive layer, first and second drain-gate contact layers located in a third conductive layer become conductive layers for forming a flip-flop of the SRAM section. The logic circuit section has no wiring layer at the same level as the first and second drain-drain contact layers.