Demodulator and receiver
US6714602B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 4, 2002 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | Oct 4, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/30
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high performance demodulator, capable of realizing further broadband characteristics, low distortion, a low power consumption, and small fluctuation in characteristics against fluctuations in temperature and fluctuations over time compared with a conventional multi-port demodulators, wherein a two-terminal first phase shifter 1004, three-terminal second branch circuit 1002, two-terminal second phase shifter 1005, and three-terminal third branch circuit 1003 are connected in series between a first signal input terminal TINSr for a reception signal and a second signal input terminal TINSlo for a local signal, a third terminal c of a first branch circuit 1001 is connected to a first power detection circuit 1006, a third terminal c of the second branch circuit 1002 is connected to a second power detection circuit 1007, and a third terminal c of the third branch circuit 1003 is connected to a third power detection circuit 1008, and comprising an N-port signal-IQ signal conversion circuit 1009 for receiving output signals P1, P2, and P3 of the first to third power detection circuits 1006 to 1008 and converting the same to demodulation signals, that is, in-phase signal I(t) and a quadra…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.