Method and apparatus for possibly decreasing the number of associative memory entries by supplementing an associative memory result with discriminator bits from an original set of information
US6715029B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2002 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | Apr 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/7453
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are disclosed for possibly decreasing the number of associative memory entries by supplementing an associative memory result with discriminator bits from an original set of information. One implementation operates on a set of information, the set of information including a lookup word portion and a discriminator portion. A lookup word is derived based on the lookup word portion. A lookup operation is performed on an associative memory, such as, but not limited to a binary or ternary content-addressable memory, using the lookup word to generate an associative memory result. A memory lookup operation is performed on a memory based on the associative memory result and the discriminator portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.