Apparatus and method for a sorting mode in a direct memory access controller of a digital signal processor
US6715058B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2000 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | Sep 27, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to sort signal group elements organized in blocks in a time-division multiplex protocol into frames of related elements, an address unit addresses the first element in each of the element blocks, then the second element in each element block, etc until all of the elements of all of the blocks have been addressed. In this manner, the related elements are sorted into frames of elements. The address unit performs this element sorting using a base address, an element index equal to the number of elements in a block, and a frame index equal to {the number of elements times (the number of frames minus one)} minus one as parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.