Methods and systems for a shared memory unit with extendable functions
US6715059B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 25, 2001 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | Jan 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are described for an enhanced shared memory unit. Embodiments of methods presented may include permitting a plurality of central processing units to simultaneously read data stored in a first shared memory address. This first shared memory address being accessed by a first central processing unit. These methods may then include receiving a request to read the first shared memory address from a second central processing unit, and receiving a request to read the first shared memory address from a third central processing unit. Furthermore, these methods may then encompass determining a relationship between data stored in the first shared memory address and data stored in a second shared memory address, and determining a relationship between data stored in the first shared memory address and data stored in a third shared memory address. Many of the methods presented also include transforming the data stored in the second shared memory address to a form equivalent to that of the data stored in the first shared memory address, and transforming the data stored in the third shared memory address to a form equivalent to that of the data stored in the first shared memory…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.